public final Port_expressionContext port_expression() throws RecognitionException {
Port_expressionContext _localctx = new Port_expressionContext(_ctx, getState());
enterRule(_localctx, 34, RULE_port_expression);
int _la;
try {
setState(825);
switch (_input.LA(1)) {
case Escaped_identifier:
case Simple_identifier:
enterOuterAlt(_localctx, 1);
{
setState(813);
port_reference();
}
break;
case T__18:
enterOuterAlt(_localctx, 2);
{
setState(814);
match(T__18);
setState(815);
port_reference();
setState(820);
_errHandler.sync(this);
_la = _input.LA(1);
while (_la==T__16) {
{
{
setState(816);
match(T__16);
setState(817);
port_reference();
}
}
setState(822);
_errHandler.sync(this);
_la = _input.LA(1);
}
setState(823);
match(T__19);
}
break;
default:
throw new NoViableAltException(this);
}
}
catch (RecognitionException re) {
_localctx.exception = re;
_errHandler.reportError(this, re);
_errHandler.recover(this, re);
}
finally {
exitRule();
}
return _localctx;
}
Verilog2001Parser.java 文件源码
java
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